(1) Technical Field
This invention relates to electronic circuitry, and more particularly to a limiter circuit with capacitor discharging capability.
(2) Background
Limiter circuits are used in electronic systems to limit power, voltage, or current to protect electrically connected “downstream” electronic devices from being damaged by excessive output (e.g., power, voltage, or current) from an “upstream” source, which may be a power source, signal source, antenna, device being tested, etc. For example, FIG. 1 is a block diagram of a prior art limiter 100 electrically connected to limit the electrical output from a source 102 delivered to a receiver 104 so as not to exceed a set output level. At normal signal levels, the output of the limiter 100 linearly tracks the input from the source 102. However, at a designed threshold signal point determined by a control voltage Vctrl, the output of the limiter 100 is significantly curtailed as the input value increases above the threshold signal point.
A number of different circuit configurations have been used as limiters, as described in U.S. patent application Ser. No. 13/841,490 cited above, which teaches a self-activating adjustable power limiter as well as describing several prior art limiters. One characteristic of such limiters is that they are reasonable well adapted to limiting “upstream” device voltage excursions having frequencies above about 1 MHz, but do not work well with voltage excursions from DC (direct current) to about 1 MHz, and in particular, from DC to about 9 KHz.
This aspect of prior limiters is particularly problematic if there is effectively a capacitor 106 between the source 102 and the power limiter 100, as shown in FIG. 1. Such a capacitor may be a planned part of the circuit design or may constitute parasitic capacitance in the circuitry. With such a configuration, if the signal from the source 102 rapidly transitions from one voltage level to another (for example, because of a sudden change in power of a received RF signal), the capacitor 106 is suddenly charged to a DC potential that may damage the receiver 104 and/or the power limiter 100 itself as the accumulated charge across the capacitor 106 discharges, as shown in the time (x-axis) versus voltage (y-axis) curve 106a. Prior limiters have not been able react fast enough to limit such sudden transitory events in the DC to about 1 MHz frequency range, and in particular, from the DC to about 9 KHz frequency range.
Accordingly, there is a need for a limiter with capacitor discharging capability that rapidly detects and discharges sudden voltage excursions of a source device. The present invention provides such a limiter.